Boundary Scan

Boundary Scan (sometimes referred to as JTAG) is a test technique that is applied to devices equipped with a special Test Access Port (TAP) and additional circuitry. Conforming to the IEEE 1149.1 standard, these devices can be tested both internally and externally using serial data conforming to the standard.

In addition to a standard basic Boundary Scan capability to test the continuity between the internal logic and the external network on the circuit board, a fully 1149.1 compliant Boundary Scan solution can be integrated into our equipment system. Diagnosys is a Technology Partner with XJTAG, and through this relationship can provide an industry leading solution for testing devices and boards fitted with Boundary Scan devices.

XJTAG provides advanced graphical software:

XJAnalyser for automatically analysing scan:

Chain configurations.
Plug-and-play configuration
Control the pins on JTAG devices
Run SVF files
JTAG Chain Debugging
Pin Watch
Run Chains / Single Step
After Dev
Device Geometry

XJRunner a complete graphical run-time:

Production environment
Complete graphical run-time
Enviroment Run-only enviroment

XJDebug for the debug of test code, including:

Breakpoints and modifications
Step through or over code a line at a time
Set, remove and display breakpoints
Check or modify the values

XJEase giving high-level device-centric:

Software capabilities for testing non-Jtag
Device from the scan chain
High-level BASIC-type language
Device-centric, not board-centric
Non-JTAG device testing

XJTAG product information

Diagnosys Products

The following Diagnosys products have boundary scan capability:

S500
S790 Series 2
PinPoint II-R

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